Author(s):
Chanchal, Amit Malik, Robert Laishram, D. S. Rawal, and Manoj Saxena

Abstract:
The manuscript investigates the DC performance of conventional HEMT and Sunken Source Connected Field Plate (SSC-FP) HEMT reliability under reverse bias step stress. To assess the electrical performance of the device at the gate terminal is subjected to a high reverse bias step stress up to – 40 V with an increase of – 5 V step. A higher degree of ON–state resistance (RON) degradation is observed in the conventional HEMT than in the SSC-FP HEMT device. Post-stress drain to source current (Ids) degradation is ~11% and ~6% in non-FP and with SSC-FP devices respectively. In conventional devices when gate voltage (VGS) is up to -20V, the device leakage current is recoverable but after that, the gate current increases exponentially and becomes noisy. In SSC-FP devices, this behavior is shown after gate voltage -30V.

Pages: 464-470

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